Item specifics
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Condition
-
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ISBN
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9781402080234
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Subject Area
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Computers, Technology & Engineering
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Publication Name
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E-Hardware Verification Language
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Publisher
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Springer
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Item Length
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9.2 in
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Subject
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Computer Science, Electronics / Circuits / Integrated, Electronics / Circuits / General, Electrical, Software Development & Engineering / Systems Analysis & Design
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Publication Year
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2004
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Type
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Textbook
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Format
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Hardcover
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Language
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English
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Item Weight
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55.4 Oz
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Item Width
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6.1 in
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Number of Pages
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Xxii, 349 Pages
The e Hardware Verification Language (Information Technology: Transmission, Proc
About this product
Product Identifiers
Publisher
Springer
ISBN-10
1402080239
ISBN-13
9781402080234
eBay Product ID (ePID)
30770994
Product Key Features
Number of Pages
Xxii, 349 Pages
Language
English
Publication Name
E-Hardware Verification Language
Publication Year
2004
Subject
Computer Science, Electronics / Circuits / Integrated, Electronics / Circuits / General, Electrical, Software Development & Engineering / Systems Analysis & Design
Type
Textbook
Subject Area
Computers, Technology & Engineering
Format
Hardcover
Dimensions
Item Weight
55.4 Oz
Item Length
9.2 in
Item Width
6.1 in
Additional Product Features
Intended Audience
Scholarly & Professional
LCCN
2004-051567
Dewey Edition
22
TitleLeading
The
Number of Volumes
1 vol.
Illustrated
Yes
Dewey Decimal
621.392
Table Of Content
Verification Methodologies and Environment Architecture.- Verification Methodologies.- Anatomy of a Verification Environment.- All About e.- e as a Programming Language.- e as a Verification Language.- Topology and Stimulus Generation.- Generator Operation.- Data Modeling and Stimulus Generation.- Sequence Generation.- Response Collection, Data Checking, and Property Monitoring.- Temporal Expressions.- Messages.- Collectors and Monitors.- Scoreboarding.- Coverage Modeling and Measurement.- Coverage Engine.- Coverage Modeling.- e Code Reuse.- e Reuse Methodology.- si_util Package.
Synopsis
I am glad to see this new book on the e language and on verification. I am especially glad to see a description of the e Reuse Methodology (eRM). The main goal of verification is, after all, finding more bugs quicker using given resources, and verification reuse (module-to-system, old-system-to-new-system etc. ) is a key enabling component. This book offers a fresh approach in teaching the e hardware verification language within the context of coverage driven verification methodology. I hope it will help the reader und- stand the many important and interesting topics surrounding hardware verification. Yoav Hollander Founder and CTO, Verisity Inc. Preface This book provides a detailed coverage of the e hardware verification language (HVL), state of the art verification methodologies, and the use of e HVL as a facilitating verification tool in implementing a state of the art verification environment. It includes comprehensive descriptions of the new concepts introduced by the e language, e language syntax, and its as- ciated semantics. This book also describes the architectural views and requirements of verifi- tion environments (randomly generated environments, coverage driven verification environments, etc. ), verification blocks in the architectural views (i. e. generators, initiators, c- lectors, checkers, monitors, coverage definitions, etc. ) and their implementations using the e HVL. Moreover, the e Reuse Methodology (eRM), the motivation for defining such a gui- line, and step-by-step instructions for building an eRM compliant e Verification Component (eVC) are also discussed.
LC Classification Number
QA75.5-76.95
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